Click here to read a full posting of “How to Blast Your Chip with High Energy Neutron Beams,”

  SemiWiki published a posting on Cell Level Reliability. To read the posting, click here.

  SemiWiki sat down with Adrian Evans at iROC Technologies to have a chat on reliability. To view a complete posting, click the below title. Reliability is the New Power

SemiWiki featured iROC Technology. To read the full posting, click here. We Live on a Radioactive Planet by Paul McLellan Published on 03-01-2013 12:45 PM Often as we move down the process node treadmill, new challenges appear that we didn’t really have to worry about before. Often, these challenges require addressing at a number of different … more →

Published May 10th 2012: Read it here

IRPS Conference, Anaheim, CA – April 16, 2012 — IROC Technologies®, developers of the industry standard for integrated circuit (IC) soft error analysis and prevention, will introduce SOCFIT® 3 at the IEEE International Reliability Physics Symposium (IRPS 2012) in Anaheim, CA from April 15th to 19th. The 3 solution focuses, at circuit level, on assessing … more →

IRPS Conference, Anaheim, CA – April 16, 2012 — IROC Technologies®, developers of the industry standard for integrated circuit (IC) soft error analysis and prevention,, will introduce TFIT 2 at the IEEE International Reliability Physics Symposium (IRPS 2012) in Anaheim, CA from April 15th to 19th. The company will present the latest functionalities and performance … more →

  iROC’s “A Practical Approach to Single Event Transient Analysis for Highly Complex Design” has just been published and is available here.

iROC will be at TSMC 2013 Open Innovation Platform Ecosystem Forum being held on Tuesday, October 1st at San Jose McEnery Convention Center. Visit our booth (#314).

  If you missed the live webinar, here’s the recording of “Do I Need to Worry About Soft Errors?”   The slides are also available at SlideShare

There are three ways to meet us at DAC 2013.  iROC will exhibit at DAC 2013 at Booth #1738. For more information, click here iROC will present at Designer Track on June 4th, 2013. iROC will present in TSMC Open Innovation Platform® Theater; 6/3 – Monday, 1:45 – 1:55 pm 6/4 – Tuesday, 11:45 – 11:55 … more →

iROC Technologies is pleased to announce that Enrico Costenaro is presenting a paper titled “A Standards Based Approach to the Reliability Specification of IP Components” at the Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN ’13) Workshop in Avignon, France on May 30, 2013. Click here to view the  Workshop schedule.

Adrian Evans will present a short webinar titled as “Do You Need to Worry About Soft Errors?” The webinar starts at 11:30 am PST on Thursday May 30th. To register, please click here.

DAC 2013 is just weeks away. Please come check iROC’s presentation during DAC 2013. SESSION 3: DESIGNER TRACK (more info) Poster Session 1 Tuesday, June 4, 2013 Time: 12:00 PM — 1:30 PM Location: Hall 5 Topic Area: Designer Track 3.34 — Reliability by Design – Balancing Reliability, Complexity, and Verification Speaker: Adrian Evans - iRoc Technologies, Grenoble, … more →

IROC will exhibit at 2013 IEEE Nuclear and Space Radiation Effects Conference (NSEREC) – booth #309 on July 8-12, 2013 in San Francisco, California at the Hyatt Regency. For more information, visit here

IROC is pleased to announce that “Reliability by Design – Balancing Reliability, Complexity and Verification” has been accepted as Designer Tracker poster at the 50th Design Automation Conference.

iROC is honored to present at IEEE VTS 2013 (Berkeley, CA, USA) on April 19, 2013. For more information, please visit here. 16:10 – 17:40   Sessions 4 Hot Topic Session 4A: Standards-Based Approaches to Reliability Analysis Olivier Lauzeral from iROC  will discuss the importance of methodologies for the reliability analysis of complex SoCs.  There is … more →

iROC is pleased to announce we will be participating in the 2013 TSMC NA Technology Symposium – Ecosystem Pavilion, San Jose on Tuesday, April 9th at San Jose McEnery Convention Center. Please come by to meet us at Booth 404.

Visit our booth (#1738) at DAC 2013, Austin Texas from June 2nd to 6th.

We are pleased to let you know that our paper titled “Neutron and Alpha Soft Error Rate Simulations for Memory and Logic Devices at Advanced Technologies” has been selected for an oral presentation at SELSE 2013. iROC Technologies will present the paper at SELSE 2013. We will speak at two session on March 26th so … more →

  You are kindly invited to the 19th IEEE International On-Line Testing Symposium (IOLTS 2013). Dimitris Gizopoulos (U. Athens) and IROC’s Dan Alexandrescu are this year’s Program Chairs. Issues related to on-line testing are increasingly important in modern electronic systems. In particular, the huge complexity of electronic systems has led to growth in reliability needs in several application domains as … more →

  IROC’s Adrian Evans participated at the “Can future system reliability problems be solved without deep understanding of technology?” panel from the 5th Workshop on Design for Reliability (DFR 2013)  

  iROC Technologies will participate in the 1st RIIF Workshop co-located with DATE 2013 in Grenoble, France on March 22nd, 2013. For more information, visit the RIIF Workshop website.

IROC will be participating in Selse-9: The 9th Workshop on Silicon Errors in Logic – System Effects at Stanford University on March 26-27, 2013 as sponsor. Day 1 – March 26th, 2013 – Stanford University 11:00 – 12:00 Session III: SER of Memory Cells Neutron and Alpha Soft Error Rate Simulations for Memory and Logic Devices … more →

  Dan Alexandrescu, a program chair of SERESSA and a VP engineering at iRoC, will teach a course “SEEs in Memories: Analysis and Mitigation” at the SERESSA 2012. For more information, visit the SERESSA website.

Visit our booth on Tuesday October 16th at San Jose Convention Center, CA 150 West San Carlos St. San Jose, CA 95110 See the program here

Please read: Optimizing ASIC reliability by design SOCIFT case